Car Electronics Chip Customization | Bespoke Silicon Solutions for Specialized Auto Modules
Car electronics chip customization has emerged as a transformative approach for automotive manufacturers seeking bespoke silicon solutions tailored to the unique requirements of specialized auto modules such as advanced sensor fusion units, high-resolution infotainment systems, domain-specific power electronics, and next-generation body control modules. By investing in customized silicon rather than relying exclusively on off-the-shelf components, automotive OEMs and tier-1 suppliers can achieve optimized performance parameters (processing speed, power consumption, interface bandwidth), reduced board space through integration of discrete functions into a single die, enhanced security through proprietary hardware implementations, and supply chain control that insulates production from the volatility of standard component availability. Car electronics chip customization enables the development of bespoke silicon solutions for specialized auto modules that differentiate vehicle platforms in an increasingly competitive automotive semiconductor landscape where software-defined features and electrified powertrains demand application-specific optimization that general-purpose chips cannot deliver.
Why Car Electronics Chip Customization is Accelerating
The automotive industry’s semiconductor content per vehicle is projected to grow from $500-$700 (2020) to $1,500-$2,000 (2030), driven by electrification, advanced driver assistance systems (ADAS), autonomous driving capabilities, and software-defined vehicle architectures. Car electronics chip customization allows OEMs to capture value from this growth by developing proprietary silicon that differentiates their vehicles.
Strategic Drivers for Bespoke Silicon Solutions
| Driver | Description | Impact on Specialized Auto Modules |
|---|---|---|
| Performance Optimization | Custom chips optimize specifically for the target workload (e.g., sensor fusion algorithm, infotainment graphics rendering) | 30-50% performance improvement versus off-the-shelf alternatives |
| Power Efficiency | Custom silicon can eliminate unused features, optimize voltage/frequency, and use low-power process nodes | 40-60% power reduction → extended EV range, reduced thermal management cost |
| Integration and Miniaturization | Multiple discrete components (MCU + DSP + interfaces + power management) integrated into single die | 50-70% board space reduction; enables smaller, lighter auto modules |
| Supply Chain Control | Custom chip supply is dedicated to the OEM (not shared with competitors) | Insulates production from semiconductor shortages affecting standard parts |
| Intellectual Property Creation | Custom architectures, algorithms, and security features become proprietary IP | Creates competitive moat; potential to license IP to other OEMs |
| Cost Reduction at Scale | While NRE (Non-Recurring Engineering) is high ($10M-$100M), unit cost decreases dramatically at volume | 20-40% BOM (Bill of Materials) cost reduction at 100K+ units/year |
| Security Hardening | Custom hardware security modules (HSM), secure boot, and encryption engines tailored to OEM’s security architecture | Reduces attack surface; protects against cyber threats and IP theft |
Why now? Three convergent trends make car electronics chip customization economically viable and strategically imperative:
- Rising semiconductor content: EVs contain 2-3x more semiconductors than internal combustion engine (ICE) vehicles, justifying the NRE investment through volume.
- Advanced process node accessibility: Foundries (TSMC, Samsung, GlobalFoundries) now offer automotive-qualified processes at 28nm, 16nm, and 7nm, enabling high-performance custom silicon.
- Automotive-grade EDA tools: Electronic Design Automation (EDA) tools (Synopsys, Cadence, Siemens) now support ISO 26262-certified design flows, reducing functional safety certification burden.
Specialized Auto Modules Requiring Bespoke Silicon Solutions
Car electronics chip customization targets auto modules where off-the-shelf components cannot meet performance, power, integration, or cost targets. Key application areas include:
1. Sensor Fusion Modules (ADAS/Autonomous Driving)
Functions: Combine data from cameras, radar, lidar, and ultrasonic sensors to create a 360-degree environment model for ADAS/autonomous driving.
Customization opportunities:
- Dedicated NPU (Neural Processing Unit): Custom NPU optimized for automotive AI workloads (object detection, semantic segmentation, sensor fusion algorithms).
- High-bandwidth interfaces: Custom SerDes (Serializer/Deserializer) interfaces for connecting multiple high-resolution cameras and radar sensors.
- Deterministic processing: Custom hardware ensures sensor data is processed within strict latency bounds (e.g., 10ms end-to-end for emergency braking decisions).
| Solution Type | Off-the-Shelf | Custom Bespoke Silicon | Improvement with Customization |
|---|---|---|---|
| Processing | NVIDIA Orin (200 TOPS) | Custom NPU (300 TOPS, optimized for OEM’s algorithms) | 50% higher performance-per-watt |
| Interfaces | Standard SerDes (4 Gbps/lane) | Custom SerDes (8 Gbps/lane, lower latency) | 2x bandwidth; 30% latency reduction |
| Power | 50W (Orin) | 30W (custom NPU) | 40% power reduction → extended EV range |
| Cost (100K units/year) | $85/unit (Orin + support ICs) | $45/unit (custom SoC) | 47% cost reduction |
2. Infotainment and Digital Cockpit Modules
Functions: Drive multiple high-resolution displays (instrument cluster, center stack, HUD, rear-seat entertainment), support Android Automotive/Apple CarPlay/Android Auto, and run voice recognition/natural language processing.
Customization opportunities:
- Custom GPU: Optimized for automotive graphics workloads (3D instrument cluster, AR navigation overlays).
- Multi-display controllers: Custom display pipelines supporting 4-8 independent displays with different resolutions and refresh rates.
- Integrated automotive interfaces: Custom SerDes for camera inputs, automotive Ethernet (1000BASE-T1) for zonal architecture.
Case Study: Electric Vehicle Digital Cockpit Custom SoC
Background: A leading EV manufacturer was using an off-the-shelf applications processor (NXP i.MX 8QuadMax) for their digital cockpit. Challenges included:
- Performance: The i.MX 8 could barely drive 3 displays (cluster, center, HUD) at 60 FPS; frame drops during navigation rendering.
- Power: The processor consumed 15W, requiring a large heat sink that encroached on cabin space.
- Cost: The i.MX 8 + external GPU + interface ICs cost $65 per unit (BOM).
- Supply chain: The i.MX 8 had 32-week lead times and experienced one EOL notification.
Solution: The OEM invested in car electronics chip customization, developing a bespoke SoC:
| Specification | Off-the-Shelf (NXP i.MX 8QuadMax) | Custom Bespoke SoC | Improvement |
|---|---|---|---|
| CPU | 4x ARM Cortex-A53 + 2x Cortex-M4F | 8x ARM Cortex-A78AE + 2x Cortex-R52 (lockstep, ASIL D) | 4x CPU performance; ASIL D safety |
| GPU | Vivante GC7000 (128 GFLOPS) | Custom GPU (512 GFLOPS, optimized for automotive) | 4x GPU performance |
| Displays | 3x (with frame drops at 60 FPS) | 6x (all at 60 FPS, 4K resolution) | 2x display capacity |
| Neural Processing | External NPU (additional $12) | Integrated NPU (20 TOPS) | Integrated; 30% cost reduction |
| Automotive Interfaces | External SerDes + Ethernet ICs ($18) | Integrated (4x 4Gbps SerDes, 2x 1000BASE-T1) | Integrated; 60% board space reduction |
| Power Consumption | 15W (with heat sink) | 9W (with small heat spreader) | 40% power reduction |
| BOM Cost (100K units) | $65 | $32 | 51% cost reduction |
| Board Space | 3,200 mm² | 980 mm² | 69% space reduction |
NRE Investment: $42M (design, IP licensing, mask sets, AEC-Q100 qualification).
Break-even Analysis:
- Annual savings: ($65 – $32) × 200,000 units/year = $6.6M/year.
- Break-even volume: $42M ÷ $6.6M/year = 6.4 years (acceptable for 10-year production program).
- 10-year production savings: $6.6M × 10 years = $66M (after subtracting $42M NRE).
Additional Benefits:
- Performance differentiation: 6-display support enabled new user experiences (rear-seat entertainment, AR HUD) that competitors could not match.
- Supply chain control: Custom SoC had 10-year supply agreement with foundry; no EOL risk.
- IP creation: OEM patented the custom GPU architecture and licensed it to a Chinese EV startup for $8M.
3. Power Electronics Modules (EV/HEV)
Functions: Control electric motor drive inverters, DC-DC converters, on-board chargers (OBC), and battery management systems (BMS).
Customization opportunities:
- Integrated gate drivers: Custom gate driver IC optimized for SiC (Silicon Carbide) or GaN (Gallium Nitride) power transistors, with integrated死区时间 (dead-time) optimization and fault detection.
- High-resolution PWM: Custom PWM modules with 16-bit resolution and 10ns step size for precise motor control (reduces torque ripple).
- Integrated current sensing: Custom ADCs (Analog-to-Digital Converters) with high-speed, high-resolution (14-bit, 5MSPS) for real-time motor current measurement.
4. Body Control and Zone Controller Modules
Functions: Control body electronics (lights, wipers, windows, door locks) and increasingly serve as zone controllers in zonal architectures (collecting sensor/actuator data and communicating with central computing over automotive Ethernet).
Customization opportunities:
- Integrated switches and drivers: Custom chip integrates high-side/low-side switches, relay drivers, and LIN/CAN-FD interfaces, eliminating 10-20 discrete components.
- Energy harvesting: Custom chip includes energy harvesting from vehicle vibrations or thermal gradients to power always-on functions (keyless entry, security).
- Zonal networking: Custom chip integrates automotive Ethernet (1000BASE-T1 or 10GBASE-T1) for high-bandwidth zonal architecture.
The Car Electronics Chip Customization Process: Step-by-Step
Developing bespoke silicon solutions for specialized auto modules follows a structured process spanning 24-36 months from concept to production.
Phase 1: Requirements Definition and Architecture Specification (Months 1-4)
Step 1.1: Stakeholder Requirements Gathering
Assemble a cross-functional team:
- System architects: Define module-level requirements (compute throughput, sensor interfaces, networking bandwidth, functional safety targets).
- Software engineers: Specify software architecture (AUTOSAR Classic/Adaptive, Android Automotive, QNX), operating system requirements, and middleware.
- Functional safety managers: Specify ISO 26262 ASIL targets (A, B, C, or D) for each subsystem.
- Cybersecurity architects: Define security requirements (EVITA HSM level, secure boot, key management, intrusion detection).
- Procurement team: Define cost targets, volume projections (5-year production plan), and supply chain strategy.
Deliverable: Hardware Requirements Specification (HRS) (100-300 pages for complex auto modules) that becomes the blueprint for the entire design.
Why thorough requirements definition is critical: Automotive systems have 10-15 year lifecycles. A poorly defined specification leads to costly re-spins (each re-spin costs $2M-$20M and adds 6-12 months). Car electronics chip customization requires rigorous upfront planning to avoid expensive downstream corrections.
Step 1.2: Competitive Benchmarking and IP Selection
Rather than designing everything from scratch, car electronics chip customization leverages existing IP (Intellectual Property) blocks:
| IP Type | Licensed from | Advantages | Disadvantages |
|---|---|---|---|
| CPU cores | ARM (Cortex-A78AE, Cortex-R52), Synopsys (ARC EV), Cadence (Tensilica) | Proven, documented, supported; reduces design risk | Licensing fees ($1M-$10M+); less differentiation |
| DSPs | CEVA, Cadence (Tensilica), Synopsys (ARC) | Optimzed for signal processing (radar, lidar, audio) | Licensing fees; integration complexity |
| NPUs (Neural Processing Units) | ARM (Ethos-N), Synopsys (NPX), Cadence (DNA) | Optimzed for AI/ML inference (autonomous driving, cabin monitoring) | Licensing fees; may not match OEM’s specific algorithms |
| Interface IP | Synopsys (DesignWare), Cadence (Tensilica IP) | Automotive Ethernet, CAN-FD, LIN, FlexRay, SerDes | Licensing fees; may require customization for optimal performance |
| Memory controllers | Synopsys, Cadence | LPDDR4X/5, DDR4/5 with ECC | Standardized; limited customization opportunity |
| Hardware Security Module (HSM) | Synopsys (tRoot), Infineon (SHE+), open-source (OpenTitan) | Secure boot, key management, cryptographic acceleration | Licensing fees; may require customization for OEM’s security architecture |
Why IP selection matters: IP licensing typically accounts for 10-30% of NRE. Selecting the right IP balances cost, performance, and differentiation. Bespoke silicon solutions for specialized auto modules often require customizing licensed IP (e.g., adding automotive-specific interfaces to a standard CPU core) to achieve optimal integration.
Phase 2: RTL Design and Functional Verification (Months 5-16)
After architecture specification, the actual hardware design begins with Register-Transfer Level (RTL) coding (typically in Verilog or VHDL).
Step 2.1: RTL Design
Design engineers write RTL code that implements the specified architecture. For car electronics chip customization, this involves:
- CPU subsystem integration: Connecting CPU cores, caches, and interconnects (AMBA AXI/ACE protocols).
- Custom accelerator integration: Integrating custom NPU, DSP, or specialized processing units designed specifically for the auto module’s workload.
- Peripheral integration: Adding automotive interfaces (CAN-FD, automotive Ethernet, LIN, FlexRay, SerDes).
- Memory subsystem: Integrating SRAM, eFlash, and external memory controllers with ECC (Error Correction Code).
- Safety mechanisms: Implementing hardware redundancy (lockstep cores, ECC on memories, built-in self-test (BIST)).
- Security features: Integrating HSM, secure boot ROM, and tamper detection circuits.
Step 2.2: Functional Verification
Verification consumes 60-70% of the design effort for complex automotive chips. The goal is to ensure the RTL behaves exactly as specified before committing to silicon.
| Verification Method | Description | Tools | Automotive-Specific Considerations |
|---|---|---|---|
| Simulation | Executing RTL against testbenches with stimulus/response checking | Synopsys VCS, Cadence Xcelium | Must simulate at temperature extremes (-40°C, +125°C) for timing/leakage |
| Formal Verification | Mathematically proves RTL matches specification | Synopsys Formality, Cadence Conformal | Critical for safety-critical blocks (lockstep, ECC logic) |
| Emulation | Mapping RTL to emulation hardware (FPGA-based) for faster execution | Synopsys Zebu, Cadence Palladium | Enables running automotive software (AUTOSAR) on pre-silicon hardware |
| FPGA Prototyping | Implementing RTL in FPGAs for real-world testing | Xilinx Virtex UltraScale+, Intel Stratix 10 | Allows early software development; validates interfaces with actual sensors/actuators |
| UVM (Universal Verification Methodology) | Standardized verification methodology with reusable testbench components | UVM libraries | Automotive IP providers (ARM, Synopsys) deliver UVM testbenches |
Why verification is especially critical for automotive: A functional bug in an automotive chip can trigger a recall affecting 100,000+ vehicles, costing $200M+. Car electronics chip customization demands verification coverage targets of 95%+ (statement, branch, and toggle coverage) before tape-out.
Phase 3: Physical Design and Design Rule Check (Months 17-24)
After RTL is verified, the design moves to physical implementation: placing transistors, routing interconnects, and inserting clock trees.
Step 3.1: Design Rule Check (DRC) and Layout Versus Schematic (LVS)
The physical layout must comply with the foundry’s design rules (minimum feature sizes, spacing, via rules) and match the schematic (LVS). EDA tools (Synopsys IC Compiler II, Cadence Innovus) automate this, but automotive designs require additional checks:
- Electromigration (EM) analysis: Ensures wires can carry required currents without degrading over the vehicle’s lifetime (15-20 years).
- IR drop analysis: Ensures voltage at every transistor is within specification (automotive chips have tight voltage tolerances, e.g., 1.0V ±5%).
- Antenna checks: Prevents charge accumulation during manufacturing that could damage gates.
- Automotive-specific DRC: Some foundries have automotive-specific design rules (e.g., double-via insertion for improved yield).
Step 3.2: Timing Closure
Automotive chips must operate across the entire temperature range (-40°C to +125°C for Grade 1). Timing analysis must verify that:
- Setup time: Data arrives at flip-flops before the clock edge (at worst-case slow process corner, high temperature).
- Hold time: Data remains stable after the clock edge (at worst-case fast process corner, low temperature).
Why timing closure is harder for automotive: Consumer chips are typically analyzed at “typical” conditions (25°C). Automotive requires analysis at -40°C, +25°C, and +125°C, with slow-slow, typical-typical, and fast-fast process corners, resulting in 9 corner analyses. This expands the design space and makes timing closure more challenging.
Tables: Comparing Off-the-Shelf vs. Custom Silicon for Auto Modules
Total Cost of Ownership (TCO) Analysis Over 5 Years (200K Units/Year)
| Cost Category | Off-the-Shelf Solution | Custom Bespoke Silicon | Notes |
|---|---|---|---|
| NRE (One-Time) | $0 | $15M – $100M | Includes design, IP, masks, AEC-Q100 qualification |
| Unit Cost (10K units/year) | $25 – $200 | $12 – $95 | Custom achieves lower unit cost at volume |
| Unit Cost (100K units/year) | $18 – $150 | $6 – $50 | Economies of scale favor custom at higher volumes |
| Unit Cost (200K units/year) | $15 – $130 | $4 – $35 | Break-even typically achieved at 200K-500K units |
| Board PCB Cost | Higher (multiple chips, larger board) | Lower (single chip, smaller board) | Custom reduces PCB layers, board size, and assembly cost |
| Power Consumption | Higher (multiple chips, interface power) | Lower (optimized for application) | Lower power reduces thermal management cost and extends EV range |
| Supply Chain Management | Higher (multiple suppliers, allocation risk) | Lower (single custom chip supplier) | Custom reduces supply chain complexity |
| 5-Year TCO (200K units/year) | $150M – $1.3B | $115M – $950M (including NRE) | Custom becomes cost-effective at 100K+ units/year |
Frequently Asked Questions (FAQ)
1. How long does it take to develop a custom chip for automotive modules?
Answer: The typical timeline for car electronics chip customization is 24-36 months:
- Architecture and IP selection: 3-6 months
- RTL design and functional verification: 12-18 months (the longest phase)
- Physical design and timing closure: 8-12 months
- Fabrication, packaging, and AEC-Q100 qualification: 6-9 months
- PPAP approval and production ramp: 3-6 months
Why so long? Automotive chips require significantly more verification (95%+ coverage vs. 70-80% for consumer chips), AEC-Q100 qualification (3-6 months of reliability testing), and PPAP documentation (1,000+ pages). Rushing the process risks functional bugs that could trigger recalls.
2. What is the typical NRE (Non-Recurring Engineering) cost for custom automotive chips?
Answer: NRE costs vary widely based on complexity:
| Automotive Chip Type | Transistor Count | Process Node | Typical NRE |
|---|---|---|---|
| Simple automotive ASIC (analog + digital, <10M transistors) | <10M | 180nm – 40nm | $5M – $15M |
| Mid-complexity automotive SoC (multiple CPUs, automotive interfaces) | 10M – 100M | 28nm – 16nm | $15M – $40M |
| High-complexity automotive SoC (AI/ML, multiple CPU clusters, automotive Ethernet) | 100M – 1B | 16nm – 7nm | $40M – $100M+ |
NRE includes: design engineering ($5M-$30M), IP licensing ($1M-$10M), mask sets ($0.5M-$2M for advanced nodes), AEC-Q100 qualification ($0.5M-$1M), and PPAP documentation ($0.2M-$0.5M).
3. Can a car manufacturer develop custom chips in-house rather than outsourcing to design services?
Answer: Yes, but it requires substantial investment:
- Engineering team: 50-200+ engineers (digital design, verification, physical design, functional safety, DFT – Design for Test).
- EDA tool licenses: $5M-$20M annually (Synopsys, Cadence, Siemens tools).
- Foundry NDA and MPW (Multi-Project Wafer) access: Requires $1M-$5M annual commitment.
- IP licensing: $5M-$20M (CPU cores, interface IP, security IP).
- Automotive certification: ISO 26262, ASPICE, and cybersecurity certification of the design process.
Who does this? Only the largest OEMs: Tesla (FSD chip), Toyota (multiple in-house chips), Volkswagen (recently announced in-house chip development), and some Chinese OEMs (BYD, NIO). Most OEMs partner with car electronics chip customization service providers to reduce risk and share costs.
4. What automotive qualification and certification does a custom chip need?
Answer: The certification requirements depend on the application:
| Standard | Scope | Required For |
|---|---|---|
| AEC-Q100 | Stress test qualification for integrated circuits | All automotive ICs |
| AEC-Q101 | Stress test qualification for discrete semiconductors | Power transistors, diodes in automotive |
| AEC-Q200 | Stress test qualification for passive components | Resistors, capacitors, inductors in automotive |
| ISO 26262 | Functional safety for road vehicles | All safety-relevant systems (ASIL A to ASIL D) |
| ISO/SAE 21434 | Cybersecurity engineering for road vehicles | All connected vehicles (required by UN R155 regulation) |
| IATF 16949 | Quality management system for automotive | All automotive suppliers (design houses and manufacturers) |
| PPAP (Level 3) | Production part approval process | All production parts supplied to automotive OEMs |
Car electronics chip customization service providers typically manage AEC-Q100 qualification and support ISO 26262 documentation. The OEM is responsible for system-level ISO 26262 certification and PPAP submission.
5. What happens if the custom chip has a bug after production starts?
Answer: This is the “nightmare scenario” for automotive programs. Mitigation strategies include:
- Respin (mask change): If the bug is in the metal layers only (not the transistor-level foundation), a “metal fix” respin can cost $0.5M-$2M and takes 3-6 months. If the bug is in the transistor layout, a full respin costs $5M-$20M and takes 6-12 months.
- Software workaround: Many bugs can be mitigated through software (e.g., disabling the buggy feature, implementing a software check). This is the preferred approach if functionally safe.
- Recall and replacement: If the bug causes safety or warranty issues, the OEM must recall affected vehicles and replace the chip.
Why first-silicon success matters: A respin delays production by 6-12 months, costs $5M-$20M, and damages the OEM’s relationship with the design house. This is why automotive chip verification is so rigorous (95%+ coverage vs. 70-80% for consumer chips).
6. Can custom automotive chips be upgraded or modified after the initial design?
Answer: Yes, but with limitations:
- Metal fix respin: Changing only the metal layers (interconnects) is relatively low-cost ($0.5M-$2M) and fast (3-6 months). This can fix certain bugs or add/remove simple features.
- Full respin: Changing the transistor layout requires new masks ($5M-$20M) and 6-12 months. This is only justified for major feature additions or bug fixes that cannot be worked around in software.
- Derivative designs: Many OEMs plan a “family” of custom chips with the same foundation (IP, process node) but different configurations (e.g., a high-end and low-end version). Derivatives cost 30-50% of the original NRE.
- In-field upgrades: Some custom automotive chips include eFPGA (embedded FPGA) or are designed for over-the-air (OTA) firmware updates, allowing feature upgrades without hardware changes.
7. What are the supply chain risks of custom automotive chips vs. off-the-shelf components?
Answer: Custom chips concentrate risk but also provide control:
Risks of custom chips:
- Single-source dependency: You depend on one foundry, one packaging house, and one design house.
- High switching cost: If your custom chip design house goes out of business, switching to an alternative is extremely expensive (new NRE of $15M-$50M).
- Obsolescence management: You are responsible for managing the lifecycle of your custom chip.
Mitigations:
- Long-term supply agreements (LTSA): Contractually guarantee supply for 10+ years.
- Multi-source strategy: Some OEMs design custom chips with two foundries for the same design (extremely expensive but provides resilience).
- IP ownership: Negotiate that you own the IP and can transfer the design to another foundry if needed.
Conclusion: Strategic Imperative for Automotive Semiconductor Differentiation
As vehicles transform into software-defined, electrically powered, and autonomously driven computers on wheels, the semiconductor content per vehicle will continue to rise. Car manufacturers that rely entirely on off-the-shelf components will find themselves constrained by generic performance envelopes, volatile supply chains, and limited differentiation. Car electronics chip customization provides a path to bespoke silicon solutions for specialized auto modules that optimize performance, power, cost, and safety for their specific vehicle architectures.
While the NRE investment is substantial ($15M-$100M), the long-term benefits—BOM cost reduction, supply chain control, performance optimization, and proprietary IP creation—make custom chips a strategic imperative for OEMs targeting leadership in the next generation of mobility. Partnering with an experienced car electronics chip customization service provider that offers ISO 26262-compliant design flows, automotive-grade IP, and a track record of first-silicon success is the key to de-risking this journey and unlocking the full potential of bespoke silicon solutions.
Keywords: car electronics chip customization, bespoke silicon solutions for specialized auto modules, automotive ASIC, automotive SoC, custom automotive chip design, ISO 26262, AEC-Q100, automotive semiconductor customization, application-specific integrated circuit automotive, automotive chip NRE cost
Tags: car electronics chip customization, bespoke silicon solutions automotive, custom automotive SoC design, specialized auto modules semiconductor, automotive ASIC customization, ISO 26262 automotive chips, AEC-Q100 custom silicon, automotive chip NRE investment, application-specific automotive chips, automotive semiconductor differentiation